1. Field of the Invention
The present invention generally relates to differential signal transfer, and more particularly, the present invention relates to input driver circuits and output driver circuits for transferring differential signals, and to differential signal transfer apparatus and methods related thereto.
A claim of priority is made to Korean Patent Application No. 10-2006-0073459, filed on Aug. 10, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
2. Description of the Related Art
Differential signal transfer is generally characterized by the utilization of two physical signal lines to transfer one bit of data. The two signal lines carry respective signals which are inverted relative to one another to denote bit information, e.g., one signal line may carry a negative (−) signal, while the other signal line may carry a positive (+) signal. When compared to single-ended signaling methods having a single signal line, differential signal transfer methods operate more favorably with respect to electromagnetic interference/electromagnetic compatibility (EMI/EMC) related issues. Also, far-field noise cancellation of differential signal transfer makes such methods more resistant to external noises such as cross-talk. As such, differential signal transfer methods are widely used in various digital display apparatuses such as plasma display panel (PDP) driver circuits, liquid crystal display (LCD) driver circuits, data interfaces in storage applications, multi-bit data buses in dynamic random access memories (DRAM), module interfaces in mobile devices, and so on.
FIG. 1 is a diagram illustrating a conventional differential signal transfer apparatus which includes an output driver circuit 10, an input driver circuit 20, and signal lines 30 arranged between the output driver circuit 10 and the input driver circuit 20.
Referring to FIG. 1, the output driver circuit 10 receives R channel signals CH1 through CHR and generates R pairs of differential signals on N signal lines 30 (N=2 R), and the input driver circuit 20 receives the R pairs of differential signals and generates R channel signals CH1′ through CHR′. In the figure, the N signal lines are identified by reference numbers P_1 through P_N. In addition, the R pairs of signal lines are identified by reference numbers 31 through 3r, and signals lines making up each pair are identified by reference numbers 31a/31b through 3ra/3rb. The number of signal lines 30 is dependent upon on the number of channels to be transferred. In particular, the conventional differential signal transfer apparatus requires 2 R signal lines 30 to differentially transfer R channel signals.
FIG. 2 is a view for explaining the operation of the conventional output driver circuit of FIG. 1. FIG. 2 illustrates an example where four (4) channel signals are transmitted through eight (8) signal lines 30.
Referring to FIG. 2, a first output buffer 11 converts a first channel signal CH1 into a first pair of differential signals (CH1(+), CH1(−)) which are transmitted through the respective signal lines 31a and 31b of the first signal line pair 31. A second output buffer 12 converts a second channel signal CH2 into a second pair of differential signals (CH2(+), CH2(−)) which are transmitted through the respective signal lines 32a and 32b of the second signal line pair 32. A third output buffer 13 converts a third channel signal CH3 into a third pair of differential signals (CH3(+), CH3(−)) which are transmitted through the respective signal lines 33a and 33b of the third signal line pair 33. Finally, a fourth output buffer 14 converts a fourth channel signal CH4 into a fourth pair of differential signals (CH4(+), CH4(−)) which are transmitted through the respective signal lines 34a and 34b of the fourth signal line pair 34. Here, (+) denote a positive differential signal among each pair of differential signals of opposite phases, and (−) denotes a negative differential signal among each pair of differential signals of opposite phases.
FIG. 3(a) shows a matrix transformation equation associated with the conventional differential transfer method. Here, “SM” denotes a signal matrix containing transformation coefficients, VP−1, VP−2, . . . , VP−N−1, VP−N denote signal levels of differential signals (+1 or −1) transmitted through the signal lines (31a, 31b), . . . , (3ra, 3rb) of the signal line pairs 31 through 3r, and VL−1, VL−2, . . . , VL−R−1, VL−R denote signal levels (0 or 1) of channel signals provided to the respective channels CH1 through CHR.
FIGS. 3(b), 3(c) and 3(d) illustrates expanded signal matrices SM in examples where the number of signal lines N=4, 8, and 16, respectively. However, referring to the matrix equation of FIG. 3(a), since the number of input channel signals R is one-half of N (R=½N), only half the coefficients of the expanded signal matrices SM of FIGS. 3(b), 3(c) and 3(d) can be utilized in the differential signal transformation. For example, when N=4, only the coefficients 1-100 and 001-1 may be utilized.
Conventional differential signal transfer methods offer the advantage of reducing noise by transmitting signals of opposite phases through separate signal lines. However, in order to maintain a data bus width and a data speed per channel, it is necessary to provides two differential signal lines per input channel. This can prove troublesome in appliances having limited available space resources.